feature s : descript i o n : ? patented technology ?high signal -3db passing bandwidth at 1. 2 g hz ? near-zero propagation delay ? v cc = 1.65 v t o 3 . 6 v ? ultra-low quiescent power: 0.1a typical ? ideally suited for low power applications ?industrial operating temperature: -40 c to +85 c ? a v a il a b l e i n 16p i n 15 0 m il w i de q s o p pac k a g e ? a v a il a b l e i n 16p i n 17 3 m il w i de t ss o p pac k a g e po t a t o s e m i c o n d u c t or s p o 3b14 a i s de s i g n ed f o r w o r l d t op per f or m a n ce u s i n g s u b m icro n c mos tech n o log y to a c h i e v e ghz high bandwidth. the p o 3b14 a is a 2-channel, 4:1 multiplexer / demultiplexer with 3-state outputs. the switch introduces no additional ground bounce noise or propagation delay. pi n co n f i gu r at i on block diagra m pin de s cription 1 2 3 4 5 16 6 15 7 14 8 13 12 11 10 9 en s 1 a 3 a 2 a 1 a 0 y a gnd v cc n.c. s 0 b 3 b 2 b 1 b 0 y b pin name description a n , b n data inputs s 0-1 select inputs en enable y a to y b data outputs gnd ground v cc power truth table enable select en s 1 s 0 y function h x x hi-z disable l l l i0 s1-0 = 0 l l h i1 s1-0 = 1 l h l i2 s1-0 = 2 l h h i3 s1-0 = 3 a0 en s0 s1 a1 a2 a3 b0 b1 b2 b3 ya yb 10/09/07 4:1 mux/demux with single enable copyright ?potato semiconductor corporation 1 PO3B14A high bandwidth potato chip
storage t emperature ................................................ ?5? to +150? ambient t emperature with power applied ............... ?0? to +85? supply v oltage to ground potential ........................... ?.5 v to +4.6v dc input v oltage ........................................................ ?.5 v to +vcc dc output current ............................................................... .... 120ma power dissipation ............................................................... ........ 0.5w maximum ratings (above which the useful life may be impaired. for user guidelines, not tested.) dc electrical characteristics, 3.3v supply (over the operating range, t a = ?0? to +85?, v cc = 3.3 v ?0% ) parameters description t est conditions min. t yp. max. units v ih input high v oltage guaranteed logic high level 2.0 v v il input lo w v oltage guaranteed logic lo w level 0.8 i ih input high current v cc = max. , v in = v cc ? a i il input lo w current v cc = max. , v in = gnd ? i ozh high impedance output current 0 y , i n v cc ? r on switch on-resistance v cc = min., v in = 0.0 v , i on = -48 m a or -64ma 14 18 ? v cc = min., v in = v cc , i on = -15 ma 16 20 dc electrical characteristics, 2.5v supply (over operating range, t a = ?0? to +85?, v cc = 2.5 v ?10%) parameters description t est conditions min. t yp. max. units v ih input high v oltage guaranteed logic high level 1.8 v cc + 0.3 v v il inout lo w v oltage guaranteed logic lo w level ?.3 0.8 i ih input high current v cc = max., v in = v cc ? a i il input lo w current v cc = max., v in = gnd ? i ozh high impedance current 0 y , in v cc ? r on switch on resistance v cc = min., v in = 0.0 v , i on = ?8ma 18 22 ? v cc = min., v in = 2.25 v , i on = -15m a 18 22 note : s t r e ss e s gr eate r than th os e li s te d un d e r maximu m r a tings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not implied. exposure to absolute maximum rating conditions for extended periods may a f fect reliabilit y . copyright ? potato semiconductor corporation 2 03/08/08 4:1 mux/demux with single enable PO3B14A high bandwidth potato chip
po w er supply c h aracteristics s y m b o l descrip t i o n tes t c o ndi t i o n s ( 1 ) m i n t y p m a x uni t ic c qui e s ce n t p o w e r su p p l y curr e n t v cc= m a x , v i n = v cc o r g n d - 0.1 3 ua notes : 1 . f o r c o n d i t i o n s s h o w n a s m a x. or m i n. , u s e a p p r o p ri a t e v a l u e s p e c i f i e d un d er e l e c t r i ca l c h a r a c t e r i s t i c s for t h e a p pl i ca b le d e v i c e t y p e . 2 . t y pica l v a l u e s a r e a t v c c = 3 . 3 v , 2 5 c a m b i e n t. 3 . t h i s p a r a m e t e r i s g u a r an t ee d b u t n o t te s t e d . 4 . n o t m o r e t h a n o n e o u t p u t s h o u l d b e s h o r t e d a t o n e ti m e . d u r a ti o n o f t h e t e s t s h o u l d n o t e x c ee d o n e s e c o nd . 5 . v o h = v cc 0 . 6 v at r a t e d c u rr e n t capacitance notes : 1 t h i s p a r a m e t e r i s d e t e r m i n e d b y d e v i c e c h a r a c t e r i z a ti on bu t n o t p r od u c t i on t e s t e d . copyright ?potato semiconductor corporation 3 (t a = 25? f = 1 mhz) parameters description t est conditions t yp. units c in input capacitance v in = 0v 3.0 pf c off(in) in capacitance, switch o f f 3.5 c off(y) y capacitance, switch o f f 6.5 c on y/in capacitance, switch on 10.0 switching characteristics over 3.3v operating range parameters description conditions units max. t plh t phl see t est diagram 0.3 ns t pzh t pzl see t est diagram 2.0 t phz t plz 3.0 dynamic electrical characteristics over the operating range (t a = -40?to +85? v cc = 3.3 v ?10%) parameter description t est condition t yp. units x t alk crosstalk r l = 100? -60 db o irr o f f-isolation r l = 100? -60 bw -3db bandwidth r l = 100? 1.2 ghz 10/09/07 4:1 mux/demux with single enable PO3B14A high bandwidth potato chip propogation delay bus enable time bus disable time
copyright ?potato semiconductor corporation 4 switching characteristics over 2.5v operating range parameters description conditions units max. t plh t phl see t est diagram 0.3 ns t pzh t pzl see t est diagram 2.0 t phz t plz 3.0 10/09/07 4:1 mux/demux with single enable PO3B14A high bandwidth potato chip test circuit for electrical characteristics r t 10pf c l v cc v in v ou t 200-ohm 200-ohm 6.0v pulse generator d.u.t switch positions t est switch t plz , t pzl 6.0 v t phz , t pzh gnd prop delay open switching waveforms t plz 1.25v 1.25v 2.5v v oh 0v v ol v dd/2 v dd/2 t phz t pzl t pzh output output v ol +0.3v v oh ?.3v v ol v oh sel input t plh 2.5v 2.5v 2.5v 2.5v t phl 3.5v 1.5v output v oh v ol v oltage w aveforms p r opagation delay t imes v oltage w aveforms enable and disable t imes propogation delay bus enable time bus disable time
p a c k aging mech a n ical dra w ing : 1 6 pin q s o p p a c k ag i ng mec h a n ic a l d r a w i ng : 1 6 p i n tss o p copyright ?potato semiconductor corporation 5 10/09/07 4:1 mux/demux with single enable PO3B14A high bandwidth potato chip
copyright ?potato semiconductor corporation 6 ordering information top-marking ordering code package 16-pin qsop tube pb-free & green 16-pin qsop tape and reel pb-free & green PO3B14Aqu PO3B14Aqr PO3B14Aq PO3B14Aq -40 c to 85 c -40 c to 85 c 16-pin tssop tube pb-free & green 16-pin tssop tape and reel pb-free & green PO3B14Atu PO3B14Atr PO3B14At PO3B14At -40 c to 85 c -40 c to 85 c t a ic package information p a c k a ge code p a c k a ge type qty per tube t ape width (mm) t ape pi t ch (mm) pin 1 l oc a tion t ape trailer len g th qty per reel t ape leader len g th q qsop 16 12 8 t op l eft corner 39 (12? 3000 64 (20? 97 t tssop 16 12 8 t op l eft corner 39 (12? 3000 64 (20? 96 10/09/07 4:1 mux/demux with single enable PO3B14A high bandwidth potato chip
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